Hardware
Chip design, FPGA, thermal, power integrity, ATPG.
- Family — hardware
- Protocol count — 5
- Anchor — every call composes with
KO42+ up to three additional operators - Precision — ≤0.1% (HulyaPulse-synced)
Protocols
| ID | Name | Deploys as |
|---|---|---|
zeq-chip-design | ZeqChipDesign | contract zeq-chip-design |
zeq-chip-test | ZeqChipTest | contract zeq-chip-test |
zeq-fpga | ZeqFPGA | contract zeq-fpga |
zeq-power-integrity | ZeqPowerIntegrity | contract zeq-power-integrity |
zeq-thermal | ZeqThermal | contract zeq-thermal |
Protocols are named formula bundles in the registry — they execute through the kernel, not through per-protocol routes.
Compose rule
Every protocol in this family composes registry operators — KO42 (the always-on time base) plus up to three more per call. Each transition fires its operator's closed-form solver; the result is phase-stamped to the Zeqond and returned with a ZeqProof. The verbatim equation the operator evaluated is recorded on the audit row as master_equation_block, so any result is re-derivable by hand.
Papers
- Zeq paper — https://doi.org/10.5281/zenodo.18158152
- Framework paper — https://doi.org/10.5281/zenodo.15825138
Middleware active. Kernel on the 1.287 Hz HulyaPulse. Awaiting next Zeqond.